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 19-2767; Rev 0, 2/03
MAX3872/MAX3874 Evaluation Kits
________________ General Description
The MAX3872/MAX3874 evaluation kits (EV kits) simplify evaluation of the MAX3872 and MAX3874 clock and data recovery with limiting amplifier ICs. These EV kits enable testing of all MAX3872 and MAX3874 functions. SMA connectors are provided for the differential inputs and outputs. All high-speed inputs and outputs have on-board AC-coupling capacitors to allow direct connection to 50 test equipment.
______________ Ordering Information
PART MAX3872EVKIT MAX3874EVKIT TEMP. RANGE -40C to +85C -40C to +85C IC PACKAGE 32 QFN 32 QFN
Evaluate: MAX3872/MAX3874
______________Component Suppliers
SUPPLIER AVX Coilcraft Digi-Key EF Johnson Murata PHONE 843-448-9411 847-639-6400 800-344-4539 402-474-4800 770-436-1300 FAX 843-626-3123 847-639-1469 218-681-3380 402-474-4858 770-436-3030
____________________________ Features

SMA Connectors for All High-Speed I/Os Operational Mode Select Pins Loss-of-Lock LED Single +3.3V Power-Supply Operation Fully Assembled and Tested
Note: Please indicate that you are using the MAX3872/MAX3874 when ordering from these suppliers.
______________________________________________________________ Component List
DESIGNATION QTY DESCRIPTION 0.1F 10% ceramic capacitors C1-C7, C17- C19, C22, C24, 14 (0402) C26, C28 Murata GRM36X7R104K016A 0.001F 10% ceramic capacitors (0402) C8-C13 6 Murata GRM36X7R102K016A 33F 10% tantalum capacitor C14 1 AVX TAJB336K016 2.2F 10% tantalum capacitor C15 1 AVX TAJB225K016 0.82F ceramic capacitor (0603) (MAX3872EVKIT) C16 1 0.068F ceramic capacitor (0402) (MAX3874EVKIT) D1 1 Red LED D2 1 Not installed R2-R5 4 Not installed R6 1 910 5% resistor (0402) R7 1 Not installed 50k variable resistor R8 1 BOURNS 3296W-203 R9 1 Not installed 56nH inductors (0805) L1-L3 3 Coilcraft CS-560XKBC DESIGNATION QTY J1-J8, J25, J26 J9, J12-J15, J17-J19 J10 J11, J16, J22, J23 J20, J21 J24 J9, J10, J12- J15, J17-J19 U1 10 8 1 4 2 1 9 DESCRIPTION SMA connectors (edge-mount, round-pin) EF JOHNSON 142-0701-851 3-pin headers (0.1in centers) 2-pin headers (0.1in centers) Not installed Test points Digi-Key 5000K-ND Not installed Shunts MAX3872EGJ, 32-pin QFN (MAX3872EVKIT) MAX3874EGJ, 32-pin QFN (MAX3874EVKIT) MAX3872/MAX3874 EV kit circuit board, Rev C MAX3872 datasheet (MAX3872EVKIT) MAX3874 datasheet (MAX3874EVKIT)
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_________________________________________________________________Maxim Integrated Products
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For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
MAX3872/MAX3874 Evaluation Kits Evaluate: MAX3872/MAX3874
_______________ Detailed Description
The MAX3872/MAX3874 EV Kit is a fully assembled and factory tested demonstration board that enables testing of all MAX3872 and MAX3874 functions. Jitter analysis and product performance can also be observed by appropriately interfacing the EV kit with a bit-error-rate tester (BERT) and a jitter analyzer.
Operational Modes
The MAX3872/MAX3874 has three modes of operation: normal, system loopback, and clock holdover. The three operational modes are programmed by connecting the appropriate pins of JU13 (SIS) and JU14 (LREF). See Table 1. Normal operation mode requires a serial data stream at the SDI inputs, system loopback mode requires a serial data stream at the SLBI inputs, and clock holdover mode requires a reference clock signal at the SLBI inputs.
Test Equipment Required * * * *
+3.3V power supply with 200mA current capability Signal-source, 2.7Gbps minimum capability Jitter analyzer capable of 2.7Gbps performance Oscilloscope with at least 3GHz performance
Test Equipment Interface
The serial inputs (SDI, SLBI) and serial outputs (SDO, SCLKO) have on-board AC-coupling capacitors to allow direct connection to 50 test equipment. The EV kit also has pads on the serial data and clock outputs (SDO, SCLKO) to allow on-board termination for coupling to high-impedance oscilloscopes.
Normal and System Loopback Settings
Three jumpers (RS1, RS2, RATESET) are available for setting the SDI or SLBI inputs to receive the appropriate data rate (Table 2). The FREFSET pin can be set high or low while in normal or system loopback mode.
Quick Start (MAX3872 & MAX3874)
This procedure will set up the evaluation board for 2.48832Gbps normal operation mode, with input threshold adjust disabled. 1) Place a shunt across pins 2 (SIS) and 3 (GND) of J13. 2) Place a shunt across pins 1 (VCC) and 2 (LREF) of J14. 3) Place a shunt across pins 2 and 3 of J15. 4) Place a shunt across pins 2 (RS1) and 3 (GND) of J17. 5) Place a shunt across pins 2 (RS2) and 3 (GND) of J18. 6) Place a shunt across pins 2 (RATESET) and 3 (GND) of J19. 7) Place a shunt across pins 1 (VCC) and 2 (VCTRL) of J9. 8) Remove the shunt from J10. 9) Place a shunt across pins 2 (FREFSET) and 3 (GND) of J12. 10) Connect a 2.48832Gbps PRBS NRZ signal to the serial data inputs (SDI) with 50 cables. Leave the SLBI inputs unconnected. 11) Connect the serial data and clock outputs (SDO, SCLKO) to a 50 high-speed oscilloscope. Terminate any unused outputs with 50 to GND. 12) Connect +3.3V to J20 (VCC) and ground to J21 (GND).
Clock Frequencies in Holdover Mode
Set the incoming reference clock frequency and outgoing serial clock frequency by setting RS1, RS2, RATESET, and FREFSET appropriately. See Table 3.
Auto Switch to Clock Holdover Mode
To switch from normal mode to clock holdover mode automatically when there are no data transitions applied to the SDI inputs connect LOL directly to LREF by placing a shunt across pins 1 and 2 of J15.
Vertical Threshold Adjustment
To compensate for optical noise presented on the data logic high caused by EDFAs in a WDM transmission system, an external analog control input is provided for adjusting the data decision threshold to an optimum level. To enable data decision threshold adjustment, place a shunt across pins 2 and 3 of J9 and shunt pins 1 and 2 of J10. Set the decision threshold by adjusting the potentiometer R8. The center point for the decision threshold is 1.2V at the VCTRL pin.
Jumpers, Controls, Test Points
Table 4 summarises the functions of all jumpers, controls, and test points of the MAX3872/MAX3874 EV Kit.
2 ________________________________________________________________________________________
MAX3872/MAX3874 Evaluation Kits
Table 1. Operational Mode Settings
MODE
Normal System Loopback Clock Holdover
Table 2. Data Rate Settings
INPUT DATA RATE
2.666Gbps 2.488Gbps/2.5Gbps 1.244Gbps/1.25Gbps* 666.51Mbps* 622.08Mbps* 166.63Mbps* 155.52Mbps*
Evaluate: MAX3872/MAX3874
SHUNT POSITIONS
LREF (JU14) 1 and 2 1 and 2 2 and 3 SIS (JU13) 2 and 3 1 and 2 (1 and 2) or (2 and 3)
SHUNT POSITIONS
RS1 2 and 3 2 and 3 1 and 2 2 and 3 2 and 3 1 and 2 1 and 2 RS2 2 and 3 2 and 3 1 and 2 1 and 2 1 and 2 2 and 3 2 and 3 RATESET 1 and 2 2 and 3 2 and 3 1 and 2 2 and 3 1 and 2 2 and 3
*Setting not available on the MAX3874
Table 3. Clock Holdover Frequency Settings
REFERENCE CLOCK FREQUENCY
666.51MHz 666.51MHz* 666.51MHz* 622.08MHz/625MHz* 622.08MHz/625MHz 622.08MHz* 622.08MHz* 166.63MHz 166.63MHz* 166.63MHz* 155.52MHz/156.25MHz* 155.52MHz/156.25MHz 155.52MHz* 155.52MHz* *Setting not available on the MAX3874
SCLKO FREQUENCY
2.666GHz 666.51MHz 166.63MHz 1.244GHz/1.25GHz 2.488GHz/2.5GHz 622.08MHz 155.52MHz 2.666GHz 666.51MHz 166.63MHz 1.244GHz/1.25GHz 2.488GHz/2.5GHz 622.08MHz 155.52MHz
SHUNT POSITIONS
RS1 2 and 3 2 and 3 1 and 2 1 and 2 2 and 3 2 and 3 1 and 2 2 and 3 2 and 3 1 and 2 1 and 2 2 and 3 2 and 3 1 and 2 RS2 2 and 3 1 and 2 2 and 3 1 and 2 2 and 3 1 and 2 2 and 3 2 and 3 1 and 2 2 and 3 1 and 2 2 and 3 1 and 2 2 and 3 RATESET 1 and 2 1 and 2 1 and 2 2 and 3 2 and 3 2 and 3 2 and 3 1 and 2 1 and 2 1 and 2 2 and 3 2 and 3 2 and 3 2 and 3 FREFSET 2 and 3 2 and 3 2 and 3 2 and 3 2 and 3 2 and 3 2 and 3 1 and 2 1 and 2 1 and 2 1 and 2 1 and 2 1 and 2 1 and 2
_________________________________________________________________________________________
3
MAX3872/MAX3874 Evaluation Kits Evaluate: MAX3872/MAX3874
Table 4. Jumpers, Controls, Test Points
NAME
J9
TYPE
3 Pin Header
DESCRIPTION
Enables/disables threshold adjust. Shunt is required on J10 when threshold adjust is enabled. Connects VREF to VCTRL through R8 when threshold adjust is enabled. Not installed Sets the reference clock frequency Selects between SDI and SLBI inputs Enables/disables clock holdover mode Connects LOL to LREF for automatic clock holdover mode or provides connection of J14 to LREF input. Not installed Multi-Rate Select Input 1 Multi-Rate Select Input 2 VCO Select Input Power supply connection to VCC. Power supply connection to GND. Not installed Not installed Not installed Threshold Control Potentiometer. Used in conjunction with J10 and J9 to set the SDI input threshold.
NORMAL POSITION
Shunt pins 1 and 2 Threshold control disabled Open -- Shunt pins 2 and 3 See Tables 2 and 3 Shunt pins 2 and 3 See Table 1 Shunt pins 1 and 2 See Table 1 Shunt pins 2 and 3 LOL not connected to LREF Open Shunt pins 2 and 3 See Tables 2 and 3 Shunt pins 2 and 3 See Tables 2 and 3 Shunt pins 2 and 3 See Tables 2 and 3 Connected to VCC Connected to GND Open Open -- --
J10 J11 J12 J13 J14 J15 J16 J17 J18 J19 J20 J21 J22 J23 J24 R8
2 Pin Header 3 Pin Header 3 Pin Header 3 Pin Header 3 Pin Header 3 Pin Header 2 Pin Header 3 Pin Header 3 Pin Header 3 Pin Header Test Point Test Point 2 Pin Header 2 Pin Header Test Point Potentiometer
4 ________________________________________________________________________________________
MAX3872/MAX3874 Evaluation Kits
J20 VCC L1 56nH C5 0.1 F C8 1000pF C11 1000pF VCC_OUT C14 33 F C15 2.2 F VCC_VCO
Evaluate: MAX3872/MAX3874
L2 56nH
C6 0.1 F
C9 1000pF
C12 1000pF VCC
J21 GND L3 56nH C7 0.1 F C10 1000pF C13 1000pF
J24 R8 50k VCC J9 J10
R9 O PEN J22
C17 0.1 F
VCC
VCC
J11
J12 VCC_O UT
J23 R2 O PEN C22 0.1 F
J5 SDO+
32
31
30
29
28
27
26
25
CAZ-
VCTRL
CAZ+
G ND
VCC
J1 SDI+
C1 0.1 F
FREFSET
VREF
G ND
VCC_O UT VCC_OUT 24 23 22 21 20 19 18 17 VCC_VCO VCC_O UT VCC_VCO VCC_OUT VCC_O UT R3 O PEN C24 0.1 F
VCC
1 2 3
VCC SDI+ SDIU1 VCC SLBI+ SLBISIS VCC_VCO LREF GND GND LOL FIL
VCC_O UT SDO+ SDOVCC_O UT
J6 SDO-
J2 SDI-
C2 0.1 F VCC
J3 SLBI+
C3 0.1 F
4 5 6 7 8
M AX3872
SCLKO+ SCLKOVCC_VCO RATESET GND RS1 RS2
R4 O PEN
C26 0.1 F
J7 SCLKO+
J4 SLBI-
C4 0.1 F
VCC
R5 O PEN
C28 0.1 F
J8 SCLKO-
10
11
12
13
14
15
VCC_VCO
J14
VCC
J16 R6 910 D1 R7 OPEN D2 OPEN C16 0.82 F VCC_VCO J17
VCC_VCO
J15
16
VCC
9
J13
J19
VCC
J18
J25
C18 0.1 F
C19 0.1 F
J26
Figure 1. MAX3872 EV Kit Schematic
_________________________________________________________________________________________
5
MAX3872/MAX3874 Evaluation Kits
J20 VCC L1 56nH C5 0.1 F C8 1000pF C11 1000pF VCC_OUT C14 33 F C15 2.2 F VCC_VCO
Evaluate: MAX3872/MAX3874
L2 56nH
C6 0.1 F
C9 1000pF
C12 1000pF VCC
J21 GND L3 56nH C7 0.1 F C10 1000pF C13 1000pF
J24 R8 50k VCC J9 J10
R9 O PEN J22
C17 0.1 F
VCC
VCC
J11
J12 VCC_O UT
J23 R2 O PEN C22 0.1 F
J5 SDO+
32
31
30
29
28
27
26
25
CAZ-
VCTRL
CAZ+
G ND
J1 SDI+
C1 0.1 F
FREFSET
VREF
G ND
VCC
VCC_O UT VCC_OUT 24 23 22 21 20 19 18 17 VCC_VCO VCC_O UT VCC_VCO VCC_OUT VCC_O UT R3 O PEN C24 0.1 F
VCC
1 2 3
VCC SDI+ SDIU1 VCC SLBI+ SLBISIS VCC_VCO LREF GND GND LOL FIL
VCC_O UT SDO+ SDOVCC_O UT
J6 SDO-
J2 SDI-
C2 0.1 F VCC
J3 SLBI+
C3 0.1 F
4 5 6 7 8
M AX3874
SCLKO+ SCLKOVCC_VCO RATESET GND RS1 RS2
R4 O PEN
C26 0.1 F
J7 SCLKO+
J4 SLBI-
C4 0.1 F
VCC
R5 O PEN
C28 0.1 F
J8 SCLKO-
10
11
12
13
14
15
VCC_VCO
J14
VCC
J16 R6 910 D1 R7 OPEN D2 OPEN C16 0.068 F VCC_VCO J17
VCC_VCO
J15
16
VCC
9
J13
J19
VCC
J18
J25
C18 0.1 F
C19 0.1 F
J26
Figure 2. MAX3874 EV Kit Schematic
6 ________________________________________________________________________________________
MAX3872/MAX3874 Evaluation Kits Evaluate: MAX3872/MAX3874
Figure 3. MAX3872/MAX3874 EV Kit Component Placement Guide--Component Side
Figure 4. MAX3872/MAX3874 EV Kit PC Board Layout-- Component Side
Figure 5. MAX3872/MAX3874 EV Kit PC Board Layout-- Ground Plane
_________________________________________________________________________________________
7
MAX3872/MAX3874 Evaluation Kits
Evaluate: MAX3872/MAX3874
Figure 6. MAX3872/MAX3874 EV Kit PC Board Layout-- Power Plane
Figure 7. MAX3872/MAX3874 EV Kit PC Board Layout-- Solder Side
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8 ___________________ Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.


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